Systems & Networks · Computer Science & AI
Hardware Architecture
The newest papers in Hardware Architecture that ReadSearch has read, newest first. Each links to its own page, with its authors, date, where it was published and the original.
200 papers, from 31 August 2026 to 5 November 2026: 184 arXiv preprints and 16 OpenAlex records.
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Newest papers, page 7
Compiling Together: High-Throughput Distributed Quantum Computing via Multi-Compilation
Quantum computing is a promising paradigm for problems that are challenging for classical machines, but realizing that promise requires far more qubits than a single processor can offer.SGAnalog: An End-to-End Circuit Benchmark from Open-Source Silicon Tapeouts
Existing analog integrated circuit design benchmarks make two questions hard to answer: whether a model has learned transferable circuit skills rather than recalled familiar examples, and whether…An Executable Benchmark for LLM-Based HLS Repair:Design Complexity and Repair Underconstraint
Automated repair of High-Level Synthesis (HLS) designs using large language models (LLMs) is an emerging but underexplored problem.ALFRED: Requirement-driven development of an open-source mobile manipulator for long-term plant monitoring
Tracking seasonal change in crops and forests requires observing the same plants repeatedly.Catscan: Visualizing Pipelines of CPU Performance Simulation
Processor pipeline visualization tools are routine inside industry CPU teams, but few of them are described or released publicly.Exact Diagonal Completion on Reachable Subspaces: Application to QAOA Placement
Unused encoding states offer opportunities to simplify quantum circuits.Characterizing High Bandwidth Flash for LLM Serving
Large language model (LLM) serving requires substantial memory to store model weights and KV caches.Q-MINO: A Minimal-Norm Method for Quantization-Aware Training
The Straight-Through Estimator (STE) is a widely used heuristic for Quantization-Aware Training (QAT), but its surrogate gradients can exhibit substantial mismatch with the underlying quantized…Making Analog Training Scale: Co-Designing Mapping, Optimizer, and Converters
Analog in-memory computing (AIMC) offers an alternative for model training by executing matrix operations directly where weights are stored.cktFormer: Transformer-Based Approach for Automated Analog Circuit Design
Circuit design is a complex and iterative process that requires expertise in electronic engineering.BEHAVE: Functional Behavior Modeling Enables Self-Improving Agents for Hardware Design and Verification
Developing agents for hardware design and verification requires reliable correctness feedback.Analog Computing revisited: A fully analog and minimalistic Damage Detector for Ultrasonic Testing enabling Material-Integrated Structural Health Monitoring
Ultrasonic Testing (UT) is commonly used to detect damage in structures, e.g., metal plates.GEM-KMeans: Memory-Efficient and Accurate Clustering on Massive Scale with GPU Optimization
Memory-efficient scaling on clustering problems without sacrificing statistical accuracy is of central interest for large-scale data analysis and machine learning problems.Hardware-Aware Functional Kolmogorov-Arnold Networks for Efficient Medical Image Enhancement and Segmentation
Functional Kolmogorov-Arnold Networks (FunKAN) achieve state-of-the-art accuracy on MRI Gibbs artifact removal and anatomical segmentation, but their 11.6 M parameters and 8.7 GFLOPs are too large…MorphAtt: A Neuromorphic Accelerator for Efficient Multi-Head Attention Processing in Spiking Vision Transformers
Spiking Vision Transformers (SViTs) are developed as an energy-efficient alternative to conventional ViTs for computer vision tasks at the edge.QBX: A Compiler for 2-local Qubit Hamiltonian Simulation on Quantum Chiplets
2-local qubit Hamiltonian simulation, a fundamental task in quantum computing, is widely applied in various applications.A Voltage-controlled MTJ-CMOS Neuron Emulating Tunable Izhikevich-Inspired Dynamics
Biological neurons exhibit diverse firing dynamics that enable adaptive and stimulus-dependent signalling, yet reproducing these dynamics in hardware has remained an enduring challenge.Hardware-Rooted PUF Fingerprinting for Device-Level Traceability in Knowledge Distillation
Knowledge distillation (KD) enables model transfer across heterogeneous platforms and deployment environments, yet it exposes proprietary models to distillation-based theft, where an adversary…MagiCFirm: A Runtime for Magic-State Cultivation with Algorithm-Hardware Co-Design
Magic-state cultivation offers a promising alternative for lowering the cost of non-Clifford operations in fault-tolerant quantum computing (FTQC).Precision and resource scaling of real-time flux distortion compensation for superconducting quantum control
Real-time waveform generation supports dynamic quantum circuits without pre-storing complete waveforms for every execution path.